diff --git a/docs/devel/lockcnt.txt b/docs/devel/lockcnt.txt
index 873931aa25..dc928f85f9 100644
--- a/docs/devel/lockcnt.txt
+++ b/docs/devel/lockcnt.txt
@@ -95,10 +95,10 @@ not just frees, though there could be cases where this is not necessary.
 
 Reads, instead, can be done without taking the mutex, as long as the
 readers and writers use the same macros that are used for RCU, for
-example qemu_atomic_rcu_read, qemu_atomic_rcu_set, QLIST_FOREACH_RCU, etc.  This is
-because the reads are done outside a lock and a set or QLIST_INSERT_HEAD
-can happen concurrently with the read.  The RCU API ensures that the
-processor and the compiler see all required memory barriers.
+example qemu_atomic_rcu_read, qemu_atomic_rcu_set, QLIST_FOREACH_RCU, etc.
+This is because the reads are done outside a lock and a set or
+QLIST_INSERT_HEAD can happen concurrently with the read.  The RCU API ensures
+that the processor and the compiler see all required memory barriers.
 
 This could be implemented simply by protecting the counter with the
 mutex, for example:
diff --git a/docs/devel/rcu.txt b/docs/devel/rcu.txt
index 53eff25686..d04791c915 100644
--- a/docs/devel/rcu.txt
+++ b/docs/devel/rcu.txt
@@ -132,8 +132,8 @@ The core RCU API is small:
 
      typeof(*p) qemu_atomic_rcu_read(p);
 
-        qemu_atomic_rcu_read() is similar to qemu_atomic_load_acquire(), but it makes
-        some assumptions on the code that calls it.  This allows a more
+	qemu_atomic_rcu_read() is similar to qemu_atomic_load_acquire(), but it
+	makes some assumptions on the code that calls it.  This allows a more
         optimized implementation.
 
         qemu_atomic_rcu_read assumes that whenever a single RCU critical
@@ -154,9 +154,9 @@ The core RCU API is small:
 
      void qemu_atomic_rcu_set(p, typeof(*p) v);
 
-        qemu_atomic_rcu_set() is similar to qemu_atomic_store_release(), though it also
-        makes assumptions on the code that calls it in order to allow a more
-        optimized implementation.
+	qemu_atomic_rcu_set() is similar to qemu_atomic_store_release(), though
+	it also makes assumptions on the code that calls it in order to allow a
+        more optimized implementation.
 
         In particular, qemu_atomic_rcu_set() suffices for synchronization
         with readers, if the updater never mutates a field within a
diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h
index c69a13ea39..6e9e221f78 100644
--- a/accel/tcg/atomic_template.h
+++ b/accel/tcg/atomic_template.h
@@ -147,7 +147,7 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr,       \
     uint16_t info = trace_mem_build_info(SHIFT, false, 0, false,    \
                                          ATOMIC_MMU_IDX);           \
     atomic_trace_rmw_pre(env, addr, info);                          \
-    ret = atomic_##X(haddr, val);                                   \
+    ret = qemu_atomic_##X(haddr, val);                              \
     ATOMIC_MMU_CLEANUP;                                             \
     atomic_trace_rmw_post(env, addr, info);                         \
     return ret;                                                     \
@@ -182,10 +182,10 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr,       \
                                          ATOMIC_MMU_IDX);           \
     atomic_trace_rmw_pre(env, addr, info);                          \
     smp_mb();                                                       \
-    cmp = qemu_atomic_read__nocheck(haddr);                              \
+    cmp = qemu_atomic_read__nocheck(haddr);                         \
     do {                                                            \
         old = cmp; new = FN(old, val);                              \
-        cmp = qemu_atomic_cmpxchg__nocheck(haddr, old, new);             \
+        cmp = qemu_atomic_cmpxchg__nocheck(haddr, old, new);        \
     } while (cmp != old);                                           \
     ATOMIC_MMU_CLEANUP;                                             \
     atomic_trace_rmw_post(env, addr, info);                         \
@@ -296,7 +296,7 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr,       \
     uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP,    \
                                          false, ATOMIC_MMU_IDX);    \
     atomic_trace_rmw_pre(env, addr, info);                          \
-    ret = atomic_##X(haddr, BSWAP(val));                            \
+    ret = qemu_atomic_##X(haddr, BSWAP(val));                       \
     ATOMIC_MMU_CLEANUP;                                             \
     atomic_trace_rmw_post(env, addr, info);                         \
     return BSWAP(ret);                                              \
@@ -329,10 +329,10 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr,       \
                                          false, ATOMIC_MMU_IDX);    \
     atomic_trace_rmw_pre(env, addr, info);                          \
     smp_mb();                                                       \
-    ldn = qemu_atomic_read__nocheck(haddr);                              \
+    ldn = qemu_atomic_read__nocheck(haddr);                         \
     do {                                                            \
         ldo = ldn; old = BSWAP(ldo); new = FN(old, val);            \
-        ldn = qemu_atomic_cmpxchg__nocheck(haddr, ldo, BSWAP(new));      \
+        ldn = qemu_atomic_cmpxchg__nocheck(haddr, ldo, BSWAP(new)); \
     } while (ldo != ldn);                                           \
     ATOMIC_MMU_CLEANUP;                                             \
     atomic_trace_rmw_post(env, addr, info);                         \
diff --git a/include/block/aio-wait.h b/include/block/aio-wait.h
index 0b3c8d4963..8f5a890666 100644
--- a/include/block/aio-wait.h
+++ b/include/block/aio-wait.h
@@ -80,7 +80,7 @@ extern AioWait global_aio_wait;
     AioWait *wait_ = &global_aio_wait;                             \
     AioContext *ctx_ = (ctx);                                      \
     /* Increment wait_->num_waiters before evaluating cond. */     \
-    qemu_atomic_inc(&wait_->num_waiters);                               \
+    qemu_atomic_inc(&wait_->num_waiters);                          \
     if (ctx_ && in_aio_context_home_thread(ctx_)) {                \
         while ((cond)) {                                           \
             aio_poll(ctx_, true);                                  \
@@ -100,7 +100,7 @@ extern AioWait global_aio_wait;
             waited_ = true;                                        \
         }                                                          \
     }                                                              \
-    qemu_atomic_dec(&wait_->num_waiters);                               \
+    qemu_atomic_dec(&wait_->num_waiters);                          \
     waited_; })
 
 /**
diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h
index 5790b27711..6e7313d736 100644
--- a/include/exec/ram_addr.h
+++ b/include/exec/ram_addr.h
@@ -361,23 +361,26 @@ static inline void cpu_physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
 
         WITH_RCU_READ_LOCK_GUARD() {
             for (i = 0; i < DIRTY_MEMORY_NUM; i++) {
-                blocks[i] = qemu_atomic_rcu_read(&ram_list.dirty_memory[i])->blocks;
+                blocks[i] =
+                    qemu_atomic_rcu_read(&ram_list.dirty_memory[i])->blocks;
             }
 
             for (k = 0; k < nr; k++) {
                 if (bitmap[k]) {
                     unsigned long temp = leul_to_cpu(bitmap[k]);
 
-                    qemu_atomic_or(&blocks[DIRTY_MEMORY_VGA][idx][offset], temp);
+                    qemu_atomic_or(&blocks[DIRTY_MEMORY_VGA][idx][offset],
+                                   temp);
 
                     if (global_dirty_log) {
-                        qemu_atomic_or(&blocks[DIRTY_MEMORY_MIGRATION][idx][offset],
-                                  temp);
+                        qemu_atomic_or(
+                            &blocks[DIRTY_MEMORY_MIGRATION][idx][offset],
+                            temp);
                     }
 
                     if (tcg_enabled()) {
                         qemu_atomic_or(&blocks[DIRTY_MEMORY_CODE][idx][offset],
-                                  temp);
+                                       temp);
                     }
                 }
 
diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
index 7bca91fe23..f2c406eb49 100644
--- a/include/qemu/atomic.h
+++ b/include/qemu/atomic.h
@@ -128,46 +128,46 @@
 #define qemu_atomic_read__nocheck(ptr) \
     __atomic_load_n(ptr, __ATOMIC_RELAXED)
 
-#define qemu_atomic_read(ptr)                              \
+#define qemu_atomic_read(ptr)                         \
     ({                                                \
     QEMU_BUILD_BUG_ON(sizeof(*ptr) > ATOMIC_REG_SIZE); \
-    qemu_atomic_read__nocheck(ptr);                        \
+    qemu_atomic_read__nocheck(ptr);                   \
     })
 
 #define qemu_atomic_set__nocheck(ptr, i) \
     __atomic_store_n(ptr, i, __ATOMIC_RELAXED)
 
-#define qemu_atomic_set(ptr, i)  do {                      \
+#define qemu_atomic_set(ptr, i)  do {                  \
     QEMU_BUILD_BUG_ON(sizeof(*ptr) > ATOMIC_REG_SIZE); \
-    qemu_atomic_set__nocheck(ptr, i);                      \
+    qemu_atomic_set__nocheck(ptr, i);                  \
 } while(0)
 
 /* See above: most compilers currently treat consume and acquire the
  * same, but this slows down qemu_atomic_rcu_read unnecessarily.
  */
 #ifdef __SANITIZE_THREAD__
-#define qemu_atomic_rcu_read__nocheck(ptr, valptr)           \
+#define qemu_atomic_rcu_read__nocheck(ptr, valptr)      \
     __atomic_load(ptr, valptr, __ATOMIC_CONSUME);
 #else
-#define qemu_atomic_rcu_read__nocheck(ptr, valptr)           \
+#define qemu_atomic_rcu_read__nocheck(ptr, valptr)      \
     __atomic_load(ptr, valptr, __ATOMIC_RELAXED);       \
     smp_read_barrier_depends();
 #endif
 
-#define qemu_atomic_rcu_read(ptr)                          \
+#define qemu_atomic_rcu_read(ptr)                     \
     ({                                                \
     QEMU_BUILD_BUG_ON(sizeof(*ptr) > ATOMIC_REG_SIZE); \
     typeof_strip_qual(*ptr) _val;                     \
-    qemu_atomic_rcu_read__nocheck(ptr, &_val);             \
+    qemu_atomic_rcu_read__nocheck(ptr, &_val);        \
     _val;                                             \
     })
 
-#define qemu_atomic_rcu_set(ptr, i) do {                   \
+#define qemu_atomic_rcu_set(ptr, i) do {              \
     QEMU_BUILD_BUG_ON(sizeof(*ptr) > ATOMIC_REG_SIZE); \
     __atomic_store_n(ptr, i, __ATOMIC_RELEASE);       \
 } while(0)
 
-#define qemu_atomic_load_acquire(ptr)                        \
+#define qemu_atomic_load_acquire(ptr)                   \
     ({                                                  \
     QEMU_BUILD_BUG_ON(sizeof(*ptr) > ATOMIC_REG_SIZE);  \
     typeof_strip_qual(*ptr) _val;                       \
@@ -175,7 +175,7 @@
     _val;                                               \
     })
 
-#define qemu_atomic_store_release(ptr, i)  do {              \
+#define qemu_atomic_store_release(ptr, i)  do {         \
     QEMU_BUILD_BUG_ON(sizeof(*ptr) > ATOMIC_REG_SIZE);  \
     __atomic_store_n(ptr, i, __ATOMIC_RELEASE);         \
 } while(0)
@@ -183,56 +183,75 @@
 
 /* All the remaining operations are fully sequentially consistent */
 
-#define qemu_atomic_xchg__nocheck(ptr, i)    ({                  \
+#define qemu_atomic_xchg__nocheck(ptr, i)    ({             \
     __atomic_exchange_n(ptr, (i), __ATOMIC_SEQ_CST);        \
 })
 
-#define qemu_atomic_xchg(ptr, i)    ({                           \
+#define qemu_atomic_xchg(ptr, i)    ({                      \
     QEMU_BUILD_BUG_ON(sizeof(*ptr) > ATOMIC_REG_SIZE);      \
-    qemu_atomic_xchg__nocheck(ptr, i);                           \
+    qemu_atomic_xchg__nocheck(ptr, i);                      \
 })
 
 /* Returns the eventual value, failed or not */
-#define qemu_atomic_cmpxchg__nocheck(ptr, old, new)    ({                    \
+#define qemu_atomic_cmpxchg__nocheck(ptr, old, new)    ({               \
     typeof_strip_qual(*ptr) _old = (old);                               \
     (void)__atomic_compare_exchange_n(ptr, &_old, new, false,           \
                               __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);      \
     _old;                                                               \
 })
 
-#define qemu_atomic_cmpxchg(ptr, old, new)    ({                             \
+#define qemu_atomic_cmpxchg(ptr, old, new)    ({                        \
     QEMU_BUILD_BUG_ON(sizeof(*ptr) > ATOMIC_REG_SIZE);                  \
-    qemu_atomic_cmpxchg__nocheck(ptr, old, new);                             \
+    qemu_atomic_cmpxchg__nocheck(ptr, old, new);                        \
 })
 
 /* Provide shorter names for GCC atomic builtins, return old value */
-#define qemu_atomic_fetch_inc(ptr)  __atomic_fetch_add(ptr, 1, __ATOMIC_SEQ_CST)
-#define qemu_atomic_fetch_dec(ptr)  __atomic_fetch_sub(ptr, 1, __ATOMIC_SEQ_CST)
+#define qemu_atomic_fetch_inc(ptr) \
+    __atomic_fetch_add(ptr, 1, __ATOMIC_SEQ_CST)
+#define qemu_atomic_fetch_dec(ptr) \
+    __atomic_fetch_sub(ptr, 1, __ATOMIC_SEQ_CST)
 
-#ifndef qemu_atomic_fetch_add
-#define qemu_atomic_fetch_add(ptr, n) __atomic_fetch_add(ptr, n, __ATOMIC_SEQ_CST)
-#define qemu_atomic_fetch_sub(ptr, n) __atomic_fetch_sub(ptr, n, __ATOMIC_SEQ_CST)
-#define qemu_atomic_fetch_and(ptr, n) __atomic_fetch_and(ptr, n, __ATOMIC_SEQ_CST)
-#define qemu_atomic_fetch_or(ptr, n)  __atomic_fetch_or(ptr, n, __ATOMIC_SEQ_CST)
-#define qemu_atomic_fetch_xor(ptr, n) __atomic_fetch_xor(ptr, n, __ATOMIC_SEQ_CST)
-#endif
+#define qemu_atomic_fetch_add(ptr, n) \
+    __atomic_fetch_add(ptr, n, __ATOMIC_SEQ_CST)
+#define qemu_atomic_fetch_sub(ptr, n) \
+    __atomic_fetch_sub(ptr, n, __ATOMIC_SEQ_CST)
+#define qemu_atomic_fetch_and(ptr, n) \
+    __atomic_fetch_and(ptr, n, __ATOMIC_SEQ_CST)
+#define qemu_atomic_fetch_or(ptr, n) \
+    __atomic_fetch_or(ptr, n, __ATOMIC_SEQ_CST)
+#define qemu_atomic_fetch_xor(ptr, n) \
+    __atomic_fetch_xor(ptr, n, __ATOMIC_SEQ_CST)
 
-#define qemu_atomic_inc_fetch(ptr)    __atomic_add_fetch(ptr, 1, __ATOMIC_SEQ_CST)
-#define qemu_atomic_dec_fetch(ptr)    __atomic_sub_fetch(ptr, 1, __ATOMIC_SEQ_CST)
-#define qemu_atomic_add_fetch(ptr, n) __atomic_add_fetch(ptr, n, __ATOMIC_SEQ_CST)
-#define qemu_atomic_sub_fetch(ptr, n) __atomic_sub_fetch(ptr, n, __ATOMIC_SEQ_CST)
-#define qemu_atomic_and_fetch(ptr, n) __atomic_and_fetch(ptr, n, __ATOMIC_SEQ_CST)
-#define qemu_atomic_or_fetch(ptr, n)  __atomic_or_fetch(ptr, n, __ATOMIC_SEQ_CST)
-#define qemu_atomic_xor_fetch(ptr, n) __atomic_xor_fetch(ptr, n, __ATOMIC_SEQ_CST)
+#define qemu_atomic_inc_fetch(ptr) \
+    __atomic_add_fetch(ptr, 1, __ATOMIC_SEQ_CST)
+#define qemu_atomic_dec_fetch(ptr) \
+    __atomic_sub_fetch(ptr, 1, __ATOMIC_SEQ_CST)
+#define qemu_atomic_add_fetch(ptr, n) \
+    __atomic_add_fetch(ptr, n, __ATOMIC_SEQ_CST)
+#define qemu_atomic_sub_fetch(ptr, n) \
+    __atomic_sub_fetch(ptr, n, __ATOMIC_SEQ_CST)
+#define qemu_atomic_and_fetch(ptr, n) \
+    __atomic_and_fetch(ptr, n, __ATOMIC_SEQ_CST)
+#define qemu_atomic_or_fetch(ptr, n) \
+    __atomic_or_fetch(ptr, n, __ATOMIC_SEQ_CST)
+#define qemu_atomic_xor_fetch(ptr, n) \
+    __atomic_xor_fetch(ptr, n, __ATOMIC_SEQ_CST)
 
 /* And even shorter names that return void.  */
-#define qemu_atomic_inc(ptr)    ((void) __atomic_fetch_add(ptr, 1, __ATOMIC_SEQ_CST))
-#define qemu_atomic_dec(ptr)    ((void) __atomic_fetch_sub(ptr, 1, __ATOMIC_SEQ_CST))
-#define qemu_atomic_add(ptr, n) ((void) __atomic_fetch_add(ptr, n, __ATOMIC_SEQ_CST))
-#define qemu_atomic_sub(ptr, n) ((void) __atomic_fetch_sub(ptr, n, __ATOMIC_SEQ_CST))
-#define qemu_atomic_and(ptr, n) ((void) __atomic_fetch_and(ptr, n, __ATOMIC_SEQ_CST))
-#define qemu_atomic_or(ptr, n)  ((void) __atomic_fetch_or(ptr, n, __ATOMIC_SEQ_CST))
-#define qemu_atomic_xor(ptr, n) ((void) __atomic_fetch_xor(ptr, n, __ATOMIC_SEQ_CST))
+#define qemu_atomic_inc(ptr) \
+    ((void) __atomic_fetch_add(ptr, 1, __ATOMIC_SEQ_CST))
+#define qemu_atomic_dec(ptr) \
+    ((void) __atomic_fetch_sub(ptr, 1, __ATOMIC_SEQ_CST))
+#define qemu_atomic_add(ptr, n) \
+    ((void) __atomic_fetch_add(ptr, n, __ATOMIC_SEQ_CST))
+#define qemu_atomic_sub(ptr, n) \
+    ((void) __atomic_fetch_sub(ptr, n, __ATOMIC_SEQ_CST))
+#define qemu_atomic_and(ptr, n) \
+    ((void) __atomic_fetch_and(ptr, n, __ATOMIC_SEQ_CST))
+#define qemu_atomic_or(ptr, n) \
+    ((void) __atomic_fetch_or(ptr, n, __ATOMIC_SEQ_CST))
+#define qemu_atomic_xor(ptr, n) \
+    ((void) __atomic_fetch_xor(ptr, n, __ATOMIC_SEQ_CST))
 
 #else /* __ATOMIC_RELAXED */
 
@@ -272,7 +291,7 @@
  * but it is a full barrier at the hardware level.  Add a compiler barrier
  * to make it a full barrier also at the compiler level.
  */
-#define qemu_atomic_xchg(ptr, i)    (barrier(), __sync_lock_test_and_set(ptr, i))
+#define qemu_atomic_xchg(ptr, i) (barrier(), __sync_lock_test_and_set(ptr, i))
 
 #elif defined(_ARCH_PPC)
 
@@ -325,8 +344,9 @@
 /* These will only be atomic if the processor does the fetch or store
  * in a single issue memory operation
  */
-#define qemu_atomic_read__nocheck(p)   (*(__typeof__(*(p)) volatile*) (p))
-#define qemu_atomic_set__nocheck(p, i) ((*(__typeof__(*(p)) volatile*) (p)) = (i))
+#define qemu_atomic_read__nocheck(p) (*(__typeof__(*(p)) volatile*) (p))
+#define qemu_atomic_set__nocheck(p, i) \
+    ((*(__typeof__(*(p)) volatile*) (p)) = (i))
 
 #define qemu_atomic_read(ptr)       qemu_atomic_read__nocheck(ptr)
 #define qemu_atomic_set(ptr, i)     qemu_atomic_set__nocheck(ptr,i)
@@ -347,10 +367,11 @@
  * Scheduling) does not perform the data read before the pointer read
  * by speculating the value of the pointer.
  *
- * Should match qemu_atomic_rcu_set(), qemu_atomic_xchg(), qemu_atomic_cmpxchg().
+ * Should match qemu_atomic_rcu_set(), qemu_atomic_xchg(),
+ * and qemu_atomic_cmpxchg().
  */
-#define qemu_atomic_rcu_read(ptr)    ({                \
-    typeof(*ptr) _val = qemu_atomic_read(ptr);         \
+#define qemu_atomic_rcu_read(ptr)    ({           \
+    typeof(*ptr) _val = qemu_atomic_read(ptr);    \
     smp_read_barrier_depends();                   \
     _val;                                         \
 })
@@ -366,29 +387,27 @@
  *
  * Should match qemu_atomic_rcu_read().
  */
-#define qemu_atomic_rcu_set(ptr, i)  do {              \
+#define qemu_atomic_rcu_set(ptr, i)  do {         \
     smp_wmb();                                    \
-    qemu_atomic_set(ptr, i);                           \
+    qemu_atomic_set(ptr, i);                      \
 } while (0)
 
-#define qemu_atomic_load_acquire(ptr)    ({      \
-    typeof(*ptr) _val = qemu_atomic_read(ptr);   \
-    smp_mb_acquire();                       \
-    _val;                                   \
+#define qemu_atomic_load_acquire(ptr)    ({    \
+    typeof(*ptr) _val = qemu_atomic_read(ptr); \
+    smp_mb_acquire();                          \
+    _val;                                      \
 })
 
 #define qemu_atomic_store_release(ptr, i)  do {  \
-    smp_mb_release();                       \
+    smp_mb_release();                            \
     qemu_atomic_set(ptr, i);                     \
 } while (0)
 
-#ifndef qemu_atomic_xchg
 #if defined(__clang__)
-#define qemu_atomic_xchg(ptr, i)    __sync_swap(ptr, i)
+#define qemu_atomic_xchg(ptr, i) __sync_swap(ptr, i)
 #else
 /* __sync_lock_test_and_set() is documented to be an acquire barrier only.  */
-#define qemu_atomic_xchg(ptr, i)    (smp_mb(), __sync_lock_test_and_set(ptr, i))
-#endif
+#define qemu_atomic_xchg(ptr, i) (smp_mb(), __sync_lock_test_and_set(ptr, i))
 #endif
 #define qemu_atomic_xchg__nocheck  qemu_atomic_xchg
 
@@ -396,13 +415,11 @@
 #define qemu_atomic_fetch_inc(ptr)  __sync_fetch_and_add(ptr, 1)
 #define qemu_atomic_fetch_dec(ptr)  __sync_fetch_and_add(ptr, -1)
 
-#ifndef qemu_atomic_fetch_add
 #define qemu_atomic_fetch_add(ptr, n) __sync_fetch_and_add(ptr, n)
 #define qemu_atomic_fetch_sub(ptr, n) __sync_fetch_and_sub(ptr, n)
 #define qemu_atomic_fetch_and(ptr, n) __sync_fetch_and_and(ptr, n)
 #define qemu_atomic_fetch_or(ptr, n) __sync_fetch_and_or(ptr, n)
 #define qemu_atomic_fetch_xor(ptr, n) __sync_fetch_and_xor(ptr, n)
-#endif
 
 #define qemu_atomic_inc_fetch(ptr)  __sync_add_and_fetch(ptr, 1)
 #define qemu_atomic_dec_fetch(ptr)  __sync_add_and_fetch(ptr, -1)
@@ -412,8 +429,10 @@
 #define qemu_atomic_or_fetch(ptr, n) __sync_or_and_fetch(ptr, n)
 #define qemu_atomic_xor_fetch(ptr, n) __sync_xor_and_fetch(ptr, n)
 
-#define qemu_atomic_cmpxchg(ptr, old, new) __sync_val_compare_and_swap(ptr, old, new)
-#define qemu_atomic_cmpxchg__nocheck(ptr, old, new)  qemu_atomic_cmpxchg(ptr, old, new)
+#define qemu_atomic_cmpxchg(ptr, old, new) \
+    __sync_val_compare_and_swap(ptr, old, new)
+#define qemu_atomic_cmpxchg__nocheck(ptr, old, new) \
+    qemu_atomic_cmpxchg(ptr, old, new)
 
 /* And even shorter names that return void.  */
 #define qemu_atomic_inc(ptr)        ((void) __sync_fetch_and_add(ptr, 1))
@@ -448,22 +467,19 @@
  * use. See docs/devel/atomics.txt for more discussion.
  */
 
-#ifndef qemu_atomic_mb_read
-#define qemu_atomic_mb_read(ptr)                             \
-    qemu_atomic_load_acquire(ptr)
-#endif
+#define qemu_atomic_mb_read(ptr) qemu_atomic_load_acquire(ptr)
 
 #ifndef qemu_atomic_mb_set
-#define qemu_atomic_mb_set(ptr, i)  do {                     \
-    qemu_atomic_store_release(ptr, i);                       \
+#define qemu_atomic_mb_set(ptr, i)  do {                \
+    qemu_atomic_store_release(ptr, i);                  \
     smp_mb();                                           \
 } while(0)
 #endif
 
-#define qemu_atomic_fetch_inc_nonzero(ptr) ({                                \
-    typeof_strip_qual(*ptr) _oldn = qemu_atomic_read(ptr);                   \
-    while (_oldn && qemu_atomic_cmpxchg(ptr, _oldn, _oldn + 1) != _oldn) {   \
-        _oldn = qemu_atomic_read(ptr);                                       \
+#define qemu_atomic_fetch_inc_nonzero(ptr) ({                           \
+    typeof_strip_qual(*ptr) _oldn = qemu_atomic_read(ptr);              \
+    while (_oldn && qemu_atomic_cmpxchg(ptr, _oldn, _oldn + 1) != _oldn) { \
+        _oldn = qemu_atomic_read(ptr);                                  \
     }                                                                   \
     _oldn;                                                              \
 })
diff --git a/include/qemu/queue.h b/include/qemu/queue.h
index 4ac4f9f0e7..707ae10062 100644
--- a/include/qemu/queue.h
+++ b/include/qemu/queue.h
@@ -218,12 +218,13 @@ struct {                                                                \
         typeof(elm) save_sle_next;                                           \
         do {                                                                 \
             save_sle_next = (elm)->field.sle_next = (head)->slh_first;       \
-        } while (qemu_atomic_cmpxchg(&(head)->slh_first, save_sle_next, (elm)) != \
+        } while (qemu_atomic_cmpxchg(&(head)->slh_first,                     \
+                                     save_sle_next, (elm)) !=                \
                  save_sle_next);                                             \
 } while (/*CONSTCOND*/0)
 
 #define QSLIST_MOVE_ATOMIC(dest, src) do {                               \
-        (dest)->slh_first = qemu_atomic_xchg(&(src)->slh_first, NULL);        \
+        (dest)->slh_first = qemu_atomic_xchg(&(src)->slh_first, NULL);   \
 } while (/*CONSTCOND*/0)
 
 #define QSLIST_REMOVE_HEAD(head, field) do {                             \
@@ -376,7 +377,8 @@ struct {                                                                \
 /*
  * Simple queue access methods.
  */
-#define QSIMPLEQ_EMPTY_ATOMIC(head) (qemu_atomic_read(&((head)->sqh_first)) == NULL)
+#define QSIMPLEQ_EMPTY_ATOMIC(head) \
+    (qemu_atomic_read(&((head)->sqh_first)) == NULL)
 #define QSIMPLEQ_EMPTY(head)        ((head)->sqh_first == NULL)
 #define QSIMPLEQ_FIRST(head)        ((head)->sqh_first)
 #define QSIMPLEQ_NEXT(elm, field)   ((elm)->field.sqe_next)
diff --git a/include/qemu/rcu_queue.h b/include/qemu/rcu_queue.h
index 32b5422779..05c924cddc 100644
--- a/include/qemu/rcu_queue.h
+++ b/include/qemu/rcu_queue.h
@@ -38,7 +38,8 @@ extern "C" {
  */
 #define QLIST_EMPTY_RCU(head) (qemu_atomic_read(&(head)->lh_first) == NULL)
 #define QLIST_FIRST_RCU(head) (qemu_atomic_rcu_read(&(head)->lh_first))
-#define QLIST_NEXT_RCU(elm, field) (qemu_atomic_rcu_read(&(elm)->field.le_next))
+#define QLIST_NEXT_RCU(elm, field) \
+    (qemu_atomic_rcu_read(&(elm)->field.le_next))
 
 /*
  * List functions.
@@ -48,11 +49,11 @@ extern "C" {
 /*
  *  The difference between qemu_atomic_read/set and qemu_atomic_rcu_read/set
  *  is in the including of a read/write memory barrier to the volatile
- *  access. atomic_rcu_* macros include the memory barrier, the
+ *  access. qemu_atomic_rcu_* macros include the memory barrier, the
  *  plain atomic macros do not. Therefore, it should be correct to
  *  issue a series of reads or writes to the same element using only
- *  the atomic_* macro, until the last read or write, which should be
- *  atomic_rcu_* to introduce a read or write memory barrier as
+ *  the qemu_atomic_* macro, until the last read or write, which should be
+ *  qemu_atomic_rcu_* to introduce a read or write memory barrier as
  *  appropriate.
  */
 
@@ -133,9 +134,11 @@ extern "C" {
  */
 
 /* Simple queue access methods */
-#define QSIMPLEQ_EMPTY_RCU(head)      (qemu_atomic_read(&(head)->sqh_first) == NULL)
-#define QSIMPLEQ_FIRST_RCU(head)       qemu_atomic_rcu_read(&(head)->sqh_first)
-#define QSIMPLEQ_NEXT_RCU(elm, field)  qemu_atomic_rcu_read(&(elm)->field.sqe_next)
+#define QSIMPLEQ_EMPTY_RCU(head) \
+    (qemu_atomic_read(&(head)->sqh_first) == NULL)
+#define QSIMPLEQ_FIRST_RCU(head) qemu_atomic_rcu_read(&(head)->sqh_first)
+#define QSIMPLEQ_NEXT_RCU(elm, field) \
+    qemu_atomic_rcu_read(&(elm)->field.sqe_next)
 
 /* Simple queue functions */
 #define QSIMPLEQ_INSERT_HEAD_RCU(head, elm, field) do {         \
@@ -198,9 +201,11 @@ extern "C" {
  */
 
 /* Tail queue access methods */
-#define QTAILQ_EMPTY_RCU(head)      (qemu_atomic_read(&(head)->tqh_first) == NULL)
-#define QTAILQ_FIRST_RCU(head)       qemu_atomic_rcu_read(&(head)->tqh_first)
-#define QTAILQ_NEXT_RCU(elm, field)  qemu_atomic_rcu_read(&(elm)->field.tqe_next)
+#define QTAILQ_EMPTY_RCU(head) \
+    (qemu_atomic_read(&(head)->tqh_first) == NULL)
+#define QTAILQ_FIRST_RCU(head) qemu_atomic_rcu_read(&(head)->tqh_first)
+#define QTAILQ_NEXT_RCU(elm, field) \
+    qemu_atomic_rcu_read(&(elm)->field.tqe_next)
 
 /* Tail queue functions */
 #define QTAILQ_INSERT_HEAD_RCU(head, elm, field) do {                   \
@@ -237,7 +242,8 @@ extern "C" {
 #define QTAILQ_INSERT_BEFORE_RCU(listelm, elm, field) do {                \
     (elm)->field.tqe_circ.tql_prev = (listelm)->field.tqe_circ.tql_prev;  \
     (elm)->field.tqe_next = (listelm);                                    \
-    qemu_atomic_rcu_set(&(listelm)->field.tqe_circ.tql_prev->tql_next, (elm)); \
+    qemu_atomic_rcu_set(&(listelm)->field.tqe_circ.tql_prev->tql_next,    \
+                        (elm));                                           \
     (listelm)->field.tqe_circ.tql_prev = &(elm)->field.tqe_circ;          \
 } while (/*CONSTCOND*/0)
 
@@ -248,7 +254,8 @@ extern "C" {
     } else {                                                            \
         (head)->tqh_circ.tql_prev = (elm)->field.tqe_circ.tql_prev;     \
     }                                                                   \
-    qemu_atomic_set(&(elm)->field.tqe_circ.tql_prev->tql_next, (elm)->field.tqe_next); \
+    qemu_atomic_set(&(elm)->field.tqe_circ.tql_prev->tql_next,          \
+                    (elm)->field.tqe_next);                             \
     (elm)->field.tqe_circ.tql_prev = NULL;                              \
 } while (/*CONSTCOND*/0)
 
@@ -267,9 +274,11 @@ extern "C" {
  */
 
 /* Singly-linked list access methods */
-#define QSLIST_EMPTY_RCU(head)      (qemu_atomic_read(&(head)->slh_first) == NULL)
-#define QSLIST_FIRST_RCU(head)       qemu_atomic_rcu_read(&(head)->slh_first)
-#define QSLIST_NEXT_RCU(elm, field)  qemu_atomic_rcu_read(&(elm)->field.sle_next)
+#define QSLIST_EMPTY_RCU(head) \
+    (qemu_atomic_read(&(head)->slh_first) == NULL)
+#define QSLIST_FIRST_RCU(head) qemu_atomic_rcu_read(&(head)->slh_first)
+#define QSLIST_NEXT_RCU(elm, field) \
+    qemu_atomic_rcu_read(&(elm)->field.sle_next)
 
 /* Singly-linked list functions */
 #define QSLIST_INSERT_HEAD_RCU(head, elm, field) do {           \
diff --git a/include/qemu/thread.h b/include/qemu/thread.h
index be38dfe5d7..104e811236 100644
--- a/include/qemu/thread.h
+++ b/include/qemu/thread.h
@@ -69,35 +69,38 @@ extern QemuCondTimedWaitFunc qemu_cond_timedwait_func;
 #define qemu_cond_timedwait(c, m, ms)                                   \
             qemu_cond_timedwait_impl(c, m, ms, __FILE__, __LINE__)
 #else
-#define qemu_mutex_lock(m) ({                                           \
+#define qemu_mutex_lock(m) ({                                                \
             QemuMutexLockFunc _f = qemu_atomic_read(&qemu_mutex_lock_func);  \
-            _f(m, __FILE__, __LINE__);                                  \
+            _f(m, __FILE__, __LINE__);                                       \
         })
 
 #define qemu_mutex_trylock(m) ({                                        \
-            QemuMutexTrylockFunc _f = qemu_atomic_read(&qemu_mutex_trylock_func); \
+            QemuMutexTrylockFunc _f =                                   \
+                qemu_atomic_read(&qemu_mutex_trylock_func);             \
             _f(m, __FILE__, __LINE__);                                  \
         })
 
 #define qemu_rec_mutex_lock(m) ({                                       \
-            QemuRecMutexLockFunc _f = qemu_atomic_read(&qemu_rec_mutex_lock_func); \
+            QemuRecMutexLockFunc _f =                                   \
+                qemu_atomic_read(&qemu_rec_mutex_lock_func);            \
             _f(m, __FILE__, __LINE__);                                  \
         })
 
-#define qemu_rec_mutex_trylock(m) ({                            \
-            QemuRecMutexTrylockFunc _f;                         \
+#define qemu_rec_mutex_trylock(m) ({                                 \
+            QemuRecMutexTrylockFunc _f;                              \
             _f = qemu_atomic_read(&qemu_rec_mutex_trylock_func);     \
-            _f(m, __FILE__, __LINE__);                          \
+            _f(m, __FILE__, __LINE__);                               \
         })
 
-#define qemu_cond_wait(c, m) ({                                         \
+#define qemu_cond_wait(c, m) ({                                              \
             QemuCondWaitFunc _f = qemu_atomic_read(&qemu_cond_wait_func);    \
-            _f(c, m, __FILE__, __LINE__);                               \
+            _f(c, m, __FILE__, __LINE__);                                    \
         })
 
-#define qemu_cond_timedwait(c, m, ms) ({                                       \
-            QemuCondTimedWaitFunc _f = qemu_atomic_read(&qemu_cond_timedwait_func); \
-            _f(c, m, ms, __FILE__, __LINE__);                                  \
+#define qemu_cond_timedwait(c, m, ms) ({                                     \
+            QemuCondTimedWaitFunc _f =                                       \
+                qemu_atomic_read(&qemu_cond_timedwait_func);                 \
+            _f(c, m, ms, __FILE__, __LINE__);                                \
         })
 #endif
 
diff --git a/linux-user/qemu.h b/linux-user/qemu.h
index 4fbf92f891..f9e835de80 100644
--- a/linux-user/qemu.h
+++ b/linux-user/qemu.h
@@ -146,8 +146,8 @@ typedef struct TaskState {
     /* Nonzero if process_pending_signals() needs to do something (either
      * handle a pending signal or unblock signals).
      * This flag is written from a signal handler so should be accessed via
-     * the qemu_atomic_read() and qemu_atomic_set() functions. (It is not accessed
-     * from multiple threads.)
+     * the qemu_atomic_read() and qemu_atomic_set() functions. (It is not
+     * accessed from multiple threads.)
      */
     int signal_pending;
 
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index cfe84b3207..abbd5e9588 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -367,7 +367,9 @@ static inline void tb_add_jump(TranslationBlock *tb, int n,
         goto out_unlock_next;
     }
     /* Atomically claim the jump destination slot only if it was NULL */
-    old = qemu_atomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL, (uintptr_t)tb_next);
+    old = qemu_atomic_cmpxchg(&tb->jmp_dest[n],
+                              (uintptr_t)NULL,
+                              (uintptr_t)tb_next);
     if (old) {
         goto out_unlock_next;
     }
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index a83d0b1b7e..2ccc44694b 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1759,7 +1759,8 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
 
 #ifdef CONFIG_PROFILER
     qemu_atomic_set(&prof->tb_count, prof->tb_count + 1);
-    qemu_atomic_set(&prof->interm_time, prof->interm_time + profile_getclock() - ti);
+    qemu_atomic_set(&prof->interm_time,
+                    prof->interm_time + profile_getclock() - ti);
     ti = profile_getclock();
 #endif
 
@@ -1804,7 +1805,8 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
     tb->tc.size = gen_code_size;
 
 #ifdef CONFIG_PROFILER
-    qemu_atomic_set(&prof->code_time, prof->code_time + profile_getclock() - ti);
+    qemu_atomic_set(&prof->code_time,
+                    prof->code_time + profile_getclock() - ti);
     qemu_atomic_set(&prof->code_in_len, prof->code_in_len + tb->size);
     qemu_atomic_set(&prof->code_out_len, prof->code_out_len + gen_code_size);
     qemu_atomic_set(&prof->search_out_len, prof->search_out_len + search_size);
diff --git a/audio/jackaudio.c b/audio/jackaudio.c
index 033245fe89..e0e9e005b7 100644
--- a/audio/jackaudio.c
+++ b/audio/jackaudio.c
@@ -129,7 +129,8 @@ static int qjack_buffer_write(QJackBuffer *buffer, float *data, int size)
     assert(buffer->data);
     const int samples = size / sizeof(float);
     int frames        = samples / buffer->channels;
-    const int avail   = buffer->frames - qemu_atomic_load_acquire(&buffer->used);
+    const int avail   = buffer->frames -
+                        qemu_atomic_load_acquire(&buffer->used);
 
     if (frames > avail) {
         frames = avail;
@@ -161,7 +162,8 @@ static int qjack_buffer_write(QJackBuffer *buffer, float *data, int size)
 static int qjack_buffer_write_l(QJackBuffer *buffer, float **dest, int frames)
 {
     assert(buffer->data);
-    const int avail   = buffer->frames - qemu_atomic_load_acquire(&buffer->used);
+    const int avail   = buffer->frames -
+                        qemu_atomic_load_acquire(&buffer->used);
     int wptr = buffer->wptr;
 
     if (frames > avail) {
diff --git a/block/block-backend.c b/block/block-backend.c
index f5846f07a4..05390209a6 100644
--- a/block/block-backend.c
+++ b/block/block-backend.c
@@ -2346,6 +2346,7 @@ void blk_io_limits_update_group(BlockBackend *blk, const char *group)
 static void blk_root_drained_begin(BdrvChild *child)
 {
     BlockBackend *blk = child->opaque;
+    ThrottleGroupMember *tgm = &blk->public.throttle_group_member;
 
     if (++blk->quiesce_counter == 1) {
         if (blk->dev_ops && blk->dev_ops->drained_begin) {
@@ -2356,8 +2357,8 @@ static void blk_root_drained_begin(BdrvChild *child)
     /* Note that blk->root may not be accessible here yet if we are just
      * attaching to a BlockDriverState that is drained. Use child instead. */
 
-    if (qemu_atomic_fetch_inc(&blk->public.throttle_group_member.io_limits_disabled) == 0) {
-        throttle_group_restart_tgm(&blk->public.throttle_group_member);
+    if (qemu_atomic_fetch_inc(&tgm->io_limits_disabled) == 0) {
+        throttle_group_restart_tgm(tgm);
     }
 }
 
diff --git a/block/throttle-groups.c b/block/throttle-groups.c
index c85a2b10ef..8d84d7cf61 100644
--- a/block/throttle-groups.c
+++ b/block/throttle-groups.c
@@ -592,7 +592,8 @@ void throttle_group_unregister_tgm(ThrottleGroupMember *tgm)
     }
 
     /* Wait for throttle_group_restart_queue_entry() coroutines to finish */
-    AIO_WAIT_WHILE(tgm->aio_context, qemu_atomic_read(&tgm->restart_pending) > 0);
+    AIO_WAIT_WHILE(tgm->aio_context,
+                   qemu_atomic_read(&tgm->restart_pending) > 0);
 
     qemu_mutex_lock(&tg->lock);
     for (i = 0; i < 2; i++) {
diff --git a/exec.c b/exec.c
index 2d8dc49606..236e9eca1a 100644
--- a/exec.c
+++ b/exec.c
@@ -695,7 +695,8 @@ address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
     IOMMUMemoryRegionClass *imrc;
     IOMMUTLBEntry iotlb;
     int iommu_idx;
-    AddressSpaceDispatch *d = qemu_atomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch);
+    AddressSpaceDispatch *d =
+        qemu_atomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch);
 
     for (;;) {
         section = address_space_translate_internal(d, addr, &addr, plen, false);
@@ -4114,7 +4115,8 @@ int ram_block_discard_disable(bool state)
         if (old < 0) {
             return -EBUSY;
         }
-    } while (qemu_atomic_cmpxchg(&ram_block_discard_disabled, old, old + 1) != old);
+    } while (qemu_atomic_cmpxchg(&ram_block_discard_disabled,
+                                 old, old + 1) != old);
     return 0;
 }
 
@@ -4132,7 +4134,8 @@ int ram_block_discard_require(bool state)
         if (old > 0) {
             return -EBUSY;
         }
-    } while (qemu_atomic_cmpxchg(&ram_block_discard_disabled, old, old - 1) != old);
+    } while (qemu_atomic_cmpxchg(&ram_block_discard_disabled,
+                                 old, old - 1) != old);
     return 0;
 }
 
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index c56ff1961f..0a33027685 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -1928,8 +1928,9 @@ static void qxl_send_events(PCIQXLDevice *d, uint32_t events)
 #define ALIGNED_UINT32_PTR(P) ((uint32_t *)P)
 #endif
 
-    old_pending = qemu_atomic_fetch_or(ALIGNED_UINT32_PTR(&d->ram->int_pending),
-                                  le_events);
+    old_pending =
+        qemu_atomic_fetch_or(ALIGNED_UINT32_PTR(&d->ram->int_pending),
+                             le_events);
     if ((old_pending & le_events) == le_events) {
         return;
     }
diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c
index 775a8525f5..a832b85ad0 100644
--- a/hw/hyperv/hyperv.c
+++ b/hw/hyperv/hyperv.c
@@ -353,7 +353,8 @@ int hyperv_set_event_flag(HvSintRoute *sint_route, unsigned eventno)
     set_mask = BIT_MASK(eventno);
     flags = synic->event_page->slot[sint_route->sint].flags;
 
-    if ((qemu_atomic_fetch_or(&flags[set_idx], set_mask) & set_mask) != set_mask) {
+    if ((qemu_atomic_fetch_or(&flags[set_idx], set_mask) & set_mask) !=
+            set_mask) {
         memory_region_set_dirty(&synic->event_page_mr, 0,
                                 sizeof(*synic->event_page));
         ret = hyperv_sint_route_set_sint(sint_route);
diff --git a/hw/rdma/rdma_backend.c b/hw/rdma/rdma_backend.c
index 0e3b8d7b49..886ce8758e 100644
--- a/hw/rdma/rdma_backend.c
+++ b/hw/rdma/rdma_backend.c
@@ -200,7 +200,8 @@ static inline void disable_rdmacm_mux_async(RdmaBackendDev *backend_dev)
 
 static inline void enable_rdmacm_mux_async(RdmaBackendDev *backend_dev)
 {
-    qemu_atomic_set(&backend_dev->rdmacm_mux.can_receive, sizeof(RdmaCmMuxMsg));
+    qemu_atomic_set(&backend_dev->rdmacm_mux.can_receive,
+                    sizeof(RdmaCmMuxMsg));
 }
 
 static inline int rdmacm_mux_can_process_async(RdmaBackendDev *backend_dev)
diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c
index ea13a90891..678c4c35e5 100644
--- a/hw/virtio/vhost.c
+++ b/hw/virtio/vhost.c
@@ -89,7 +89,7 @@ static void vhost_dev_sync_region(struct vhost_dev *dev,
             continue;
         }
         /* Data must be read atomically. We don't really need barrier semantics
-         * but it's easier to use atomic_* than roll our own. */
+         * but it's easier to use qemu_atomic_* than roll our own. */
         log = qemu_atomic_xchg(from, 0);
         while (log) {
             int bit = ctzl(log);
diff --git a/linux-user/hppa/cpu_loop.c b/linux-user/hppa/cpu_loop.c
index b5d0827524..7ef313c325 100644
--- a/linux-user/hppa/cpu_loop.c
+++ b/linux-user/hppa/cpu_loop.c
@@ -81,7 +81,8 @@ static abi_ulong hppa_lws(CPUHPPAState *env)
                 o64 = *(uint64_t *)g2h(old);
                 n64 = *(uint64_t *)g2h(new);
 #ifdef CONFIG_ATOMIC64
-                r64 = qemu_atomic_cmpxchg__nocheck((uint64_t *)g2h(addr), o64, n64);
+                r64 = qemu_atomic_cmpxchg__nocheck((uint64_t *)g2h(addr),
+                                                   o64, n64);
                 ret = r64 != o64;
 #else
                 start_exclusive();
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index 94a4bc4988..08ca265d5a 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -813,7 +813,8 @@ static void mark_postcopy_blocktime_end(uintptr_t addr)
     for (i = 0; i < smp_cpus; i++) {
         uint32_t vcpu_blocktime = 0;
 
-        read_vcpu_time = qemu_atomic_fetch_add(&dc->page_fault_vcpu_time[i], 0);
+        read_vcpu_time =
+            qemu_atomic_fetch_add(&dc->page_fault_vcpu_time[i], 0);
         if (qemu_atomic_fetch_add(&dc->vcpu_addr[i], 0) != addr ||
             read_vcpu_time == 0) {
             continue;
diff --git a/softmmu/cpus.c b/softmmu/cpus.c
index 7f00b24fa3..94fcadea4a 100644
--- a/softmmu/cpus.c
+++ b/softmmu/cpus.c
@@ -1479,7 +1479,7 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg)
             cpu = CPU_NEXT(cpu);
         } /* while (cpu && !cpu->exit_request).. */
 
-        /* Does not need qemu_atomic_mb_set because a spurious wakeup is okay.  */
+        /* Doesn't need qemu_atomic_mb_set because a spurious wakeup is okay */
         qemu_atomic_set(&tcg_current_rr_cpu, NULL);
 
         if (cpu && cpu->exit_request) {
diff --git a/tcg/tcg.c b/tcg/tcg.c
index e2f02306e3..88152ae4df 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -4190,7 +4190,8 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
         TCGOpcode opc = op->opc;
 
 #ifdef CONFIG_PROFILER
-        qemu_atomic_set(&prof->table_op_count[opc], prof->table_op_count[opc] + 1);
+        qemu_atomic_set(&prof->table_op_count[opc],
+                        prof->table_op_count[opc] + 1);
 #endif
 
         switch (opc) {
diff --git a/tests/test-rcu-list.c b/tests/test-rcu-list.c
index e32f989b1b..d014e3f21b 100644
--- a/tests/test-rcu-list.c
+++ b/tests/test-rcu-list.c
@@ -305,7 +305,8 @@ static void rcu_qtest(const char *test, int duration, int nreaders)
     qemu_atomic_set_i64(&n_nodes_removed, n_nodes_removed + n_removed_local);
     qemu_mutex_unlock(&counts_mutex);
     synchronize_rcu();
-    while (qemu_atomic_read_i64(&n_nodes_removed) > qemu_atomic_read_i64(&n_reclaims)) {
+    while (qemu_atomic_read_i64(&n_nodes_removed) >
+           qemu_atomic_read_i64(&n_reclaims)) {
         g_usleep(100);
         synchronize_rcu();
     }
@@ -316,7 +317,8 @@ static void rcu_qtest(const char *test, int duration, int nreaders)
         printf("%s: %d readers; 1 updater; nodes read: "  \
                "%lld, nodes removed: %"PRIi64"; nodes reclaimed: %"PRIi64"\n",
                test, nthreadsrunning - 1, n_reads,
-               qemu_atomic_read_i64(&n_nodes_removed), qemu_atomic_read_i64(&n_reclaims));
+               qemu_atomic_read_i64(&n_nodes_removed),
+               qemu_atomic_read_i64(&n_reclaims));
         exit(0);
     }
 }
diff --git a/util/aio-posix.c b/util/aio-posix.c
index fbe323324f..777eae4d1d 100644
--- a/util/aio-posix.c
+++ b/util/aio-posix.c
@@ -581,7 +581,8 @@ bool aio_poll(AioContext *ctx, bool blocking)
      */
     use_notify_me = timeout != 0;
     if (use_notify_me) {
-        qemu_atomic_set(&ctx->notify_me, qemu_atomic_read(&ctx->notify_me) + 2);
+        qemu_atomic_set(&ctx->notify_me,
+                        qemu_atomic_read(&ctx->notify_me) + 2);
         /*
          * Write ctx->notify_me before reading ctx->notified.  Pairs with
          * smp_mb in aio_notify().
diff --git a/util/aio-win32.c b/util/aio-win32.c
index 7392e69eb2..cfa81c6217 100644
--- a/util/aio-win32.c
+++ b/util/aio-win32.c
@@ -345,7 +345,8 @@ bool aio_poll(AioContext *ctx, bool blocking)
      * so disable the optimization now.
      */
     if (blocking) {
-        qemu_atomic_set(&ctx->notify_me, qemu_atomic_read(&ctx->notify_me) + 2);
+        qemu_atomic_set(&ctx->notify_me,
+                        qemu_atomic_read(&ctx->notify_me) + 2);
         /*
          * Write ctx->notify_me before computing the timeout
          * (reading bottom half flags, etc.).  Pairs with
@@ -384,7 +385,8 @@ bool aio_poll(AioContext *ctx, bool blocking)
         ret = WaitForMultipleObjects(count, events, FALSE, timeout);
         if (blocking) {
             assert(first);
-            qemu_atomic_store_release(&ctx->notify_me, qemu_atomic_read(&ctx->notify_me) - 2);
+            qemu_atomic_store_release(&ctx->notify_me,
+                                      qemu_atomic_read(&ctx->notify_me) - 2);
             aio_notify_accept(ctx);
         }
 
diff --git a/util/async.c b/util/async.c
index 0aec51c33a..9341aacdcd 100644
--- a/util/async.c
+++ b/util/async.c
@@ -96,11 +96,11 @@ static QEMUBH *aio_bh_dequeue(BHList *head, unsigned *flags)
     QSLIST_REMOVE_HEAD(head, next);
 
     /*
-     * The qemu_atomic_and is paired with aio_bh_enqueue().  The implicit memory
-     * barrier ensures that the callback sees all writes done by the scheduling
-     * thread.  It also ensures that the scheduling thread sees the cleared
-     * flag before bh->cb has run, and thus will call aio_notify again if
-     * necessary.
+     * The qemu_atomic_and is paired with aio_bh_enqueue().  The implicit
+     * memory barrier ensures that the callback sees all writes done by the
+     * scheduling thread.  It also ensures that the scheduling thread sees the
+     * cleared flag before bh->cb has run, and thus will call aio_notify again
+     * if necessary.
      */
     *flags = qemu_atomic_fetch_and(&bh->flags,
                               ~(BH_PENDING | BH_SCHEDULED | BH_IDLE));
@@ -276,7 +276,8 @@ aio_ctx_check(GSource *source)
     BHListSlice *s;
 
     /* Finish computing the timeout before clearing the flag.  */
-    qemu_atomic_store_release(&ctx->notify_me, qemu_atomic_read(&ctx->notify_me) & ~1);
+    qemu_atomic_store_release(&ctx->notify_me,
+                              qemu_atomic_read(&ctx->notify_me) & ~1);
     aio_notify_accept(ctx);
 
     QSLIST_FOREACH_RCU(bh, &ctx->bh_list, next) {
diff --git a/util/fdmon-io_uring.c b/util/fdmon-io_uring.c
index fc3b5ace48..b1222e5370 100644
--- a/util/fdmon-io_uring.c
+++ b/util/fdmon-io_uring.c
@@ -103,7 +103,8 @@ static void enqueue(AioHandlerSList *head, AioHandler *node, unsigned flags)
 {
     unsigned old_flags;
 
-    old_flags = qemu_atomic_fetch_or(&node->flags, FDMON_IO_URING_PENDING | flags);
+    old_flags = qemu_atomic_fetch_or(&node->flags,
+                                     FDMON_IO_URING_PENDING | flags);
     if (!(old_flags & FDMON_IO_URING_PENDING)) {
         QSLIST_INSERT_HEAD_ATOMIC(head, node, node_submitted);
     }
diff --git a/util/lockcnt.c b/util/lockcnt.c
index d57e9317e4..841d9df69c 100644
--- a/util/lockcnt.c
+++ b/util/lockcnt.c
@@ -116,13 +116,16 @@ void qemu_lockcnt_inc(QemuLockCnt *lockcnt)
     for (;;) {
         if (val >= QEMU_LOCKCNT_COUNT_STEP) {
             int expected = val;
-            val = qemu_atomic_cmpxchg(&lockcnt->count, val, val + QEMU_LOCKCNT_COUNT_STEP);
+            val = qemu_atomic_cmpxchg(&lockcnt->count, val,
+                                      val + QEMU_LOCKCNT_COUNT_STEP);
             if (val == expected) {
                 break;
             }
         } else {
             /* The fast path is (0, unlocked)->(1, unlocked).  */
-            if (qemu_lockcnt_cmpxchg_or_wait(lockcnt, &val, QEMU_LOCKCNT_COUNT_STEP,
+            if (qemu_lockcnt_cmpxchg_or_wait(lockcnt,
+                                             &val,
+                                             QEMU_LOCKCNT_COUNT_STEP,
                                              &waited)) {
                 break;
             }
@@ -158,7 +161,8 @@ bool qemu_lockcnt_dec_and_lock(QemuLockCnt *lockcnt)
     for (;;) {
         if (val >= 2 * QEMU_LOCKCNT_COUNT_STEP) {
             int expected = val;
-            val = qemu_atomic_cmpxchg(&lockcnt->count, val, val - QEMU_LOCKCNT_COUNT_STEP);
+            val = qemu_atomic_cmpxchg(&lockcnt->count, val,
+                                      val - QEMU_LOCKCNT_COUNT_STEP);
             if (val == expected) {
                 break;
             }
@@ -166,7 +170,8 @@ bool qemu_lockcnt_dec_and_lock(QemuLockCnt *lockcnt)
             /* If count is going 1->0, take the lock. The fast path is
              * (1, unlocked)->(0, locked) or (1, unlocked)->(0, waiting).
              */
-            if (qemu_lockcnt_cmpxchg_or_wait(lockcnt, &val, locked_state, &waited)) {
+            if (qemu_lockcnt_cmpxchg_or_wait(lockcnt, &val, locked_state,
+                                             &waited)) {
                 return true;
             }
 
diff --git a/util/qemu-coroutine-lock.c b/util/qemu-coroutine-lock.c
index 27f39327a0..942f5c43f2 100644
--- a/util/qemu-coroutine-lock.c
+++ b/util/qemu-coroutine-lock.c
@@ -322,7 +322,8 @@ void coroutine_fn qemu_co_mutex_unlock(CoMutex *mutex)
         /* Try to do the handoff protocol ourselves; if somebody else has
          * already taken it, however, we're done and they're responsible.
          */
-        if (qemu_atomic_cmpxchg(&mutex->handoff, our_handoff, 0) != our_handoff) {
+        if (qemu_atomic_cmpxchg(&mutex->handoff,
+                                our_handoff, 0) != our_handoff) {
             break;
         }
     }
diff --git a/util/qht.c b/util/qht.c
index 375b7651b5..2cedc1ae35 100644
--- a/util/qht.c
+++ b/util/qht.c
@@ -340,7 +340,8 @@ struct qht_bucket *qht_bucket_lock__no_stale(struct qht *ht, uint32_t hash,
 
 static inline bool qht_map_needs_resize(const struct qht_map *map)
 {
-    return qemu_atomic_read(&map->n_added_buckets) > map->n_added_buckets_threshold;
+    return qemu_atomic_read(&map->n_added_buckets) >
+           map->n_added_buckets_threshold;
 }
 
 static inline void qht_chain_destroy(const struct qht_bucket *head)
diff --git a/util/qsp.c b/util/qsp.c
index e5333917db..31ec2a2482 100644
--- a/util/qsp.c
+++ b/util/qsp.c
@@ -39,7 +39,7 @@
  *
  * - Use a glib HT for each thread, protecting each HT with its own lock.
  *   This isn't simpler than the current design, and is 10% slower in the
- *   qemu_atomic_add-bench microbenchmark (-m option).
+ *   atomic_add-bench microbenchmark (-m option).
  *
  * - For reports, just use a binary tree as we aggregate data, instead of having
  *   an intermediate hash table. This would simplify the code only slightly, but
@@ -47,7 +47,7 @@
  *
  * - Wrap operations on qsp entries with RCU read-side critical sections, so
  *   that qsp_reset() can delete entries. Unfortunately, the overhead of calling
- *   rcu_read_lock/unlock slows down qemu_atomic_add-bench -m by 24%. Having
+ *   rcu_read_lock/unlock slows down atomic_add-bench -m by 24%. Having
  *   a snapshot that is updated on qsp_reset() avoids this overhead.
  *
  * Related Work:
diff --git a/docs/devel/atomics.rst b/docs/devel/atomics.rst
index 90416d38d1..07ad91654e 100644
--- a/docs/devel/atomics.rst
+++ b/docs/devel/atomics.rst
@@ -24,8 +24,8 @@ provides macros that fall in three camps:
 - compiler barriers: ``barrier()``;
 
 - weak atomic access and manual memory barriers: ``qemu_atomic_read()``,
-  ``qemu_atomic_set()``, ``smp_rmb()``, ``smp_wmb()``, ``smp_mb()``, ``smp_mb_acquire()``,
-  ``smp_mb_release()``, ``smp_read_barrier_depends()``;
+  ``qemu_atomic_set()``, ``smp_rmb()``, ``smp_wmb()``, ``smp_mb()``,
+  ``smp_mb_acquire()``, ``smp_mb_release()``, ``smp_read_barrier_depends()``;
 
 - sequentially consistent atomic access: everything else.
 
@@ -115,12 +115,12 @@ easiest to hardest):
 
 - lightweight synchronization primitives such as ``QemuEvent``
 
-- RCU operations (``qemu_atomic_rcu_read``, ``qemu_atomic_rcu_set``) when publishing
-  or accessing a new version of a data structure
+- RCU operations (``qemu_atomic_rcu_read``, ``qemu_atomic_rcu_set``) when
+  publishing or accessing a new version of a data structure
 
-- other atomic accesses: ``qemu_atomic_read`` and ``qemu_atomic_load_acquire`` for
-  loads, ``qemu_atomic_set`` and ``qemu_atomic_store_release`` for stores, ``smp_mb``
-  to forbid reordering subsequent loads before a store.
+- other atomic accesses: ``qemu_atomic_read`` and ``qemu_atomic_load_acquire``
+  for loads, ``qemu_atomic_set`` and ``qemu_atomic_store_release`` for stores,
+  ``smp_mb`` to forbid reordering subsequent loads before a store.
 
 
 Weak atomic access and manual memory barriers
@@ -149,8 +149,8 @@ The only guarantees that you can rely upon in this case are:
 
 When using this model, variables are accessed with:
 
-- ``qemu_atomic_read()`` and ``qemu_atomic_set()``; these prevent the compiler from
-  optimizing accesses out of existence and creating unsolicited
+- ``qemu_atomic_read()`` and ``qemu_atomic_set()``; these prevent the compiler
+  from optimizing accesses out of existence and creating unsolicited
   accesses, but do not otherwise impose any ordering on loads and
   stores: both the compiler and the processor are free to reorder
   them.
@@ -229,18 +229,18 @@ They come in six kinds:
   dependency and a full read barrier or better is required.
 
 
-Memory barriers and ``qemu_atomic_load_acquire``/``qemu_atomic_store_release`` are
-mostly used when a data structure has one thread that is always a writer
+Memory barriers and ``qemu_atomic_load_acquire``/``qemu_atomic_store_release``
+are mostly used when a data structure has one thread that is always a writer
 and one thread that is always a reader:
 
-    +----------------------------------+----------------------------------+
-    | thread 1                         | thread 2                         |
-    +==================================+==================================+
-    | ::                               | ::                               |
-    |                                  |                                  |
+    +---------------------------------------+---------------------------------------+
+    | thread 1                              | thread 2                              |
+    +=======================================+=======================================+
+    | ::                                    | ::                                    |
+    |                                       |                                       |
     |   qemu_atomic_store_release(&a, x);   |   y = qemu_atomic_load_acquire(&b);   |
     |   qemu_atomic_store_release(&b, y);   |   x = qemu_atomic_load_acquire(&a);   |
-    +----------------------------------+----------------------------------+
+    +---------------------------------------+---------------------------------------+
 
 In this case, correctness is easy to check for using the "pairing"
 trick that is explained below.
@@ -251,54 +251,54 @@ thread, exactly one other thread will read or write each of these
 variables).  In this case, it is possible to "hoist" the barriers
 outside a loop.  For example:
 
-    +------------------------------------------+----------------------------------+
-    | before                                   | after                            |
-    +==========================================+==================================+
-    | ::                                       | ::                               |
-    |                                          |                                  |
-    |   n = 0;                                 |   n = 0;                         |
-    |   for (i = 0; i < 10; i++)               |   for (i = 0; i < 10; i++)       |
+    +-----------------------------------------------+---------------------------------------+
+    | before                                        | after                                 |
+    +===============================================+=======================================+
+    | ::                                            | ::                                    |
+    |                                               |                                       |
+    |   n = 0;                                      |   n = 0;                              |
+    |   for (i = 0; i < 10; i++)                    |   for (i = 0; i < 10; i++)            |
     |     n += qemu_atomic_load_acquire(&a[i]);     |     n += qemu_atomic_read(&a[i]);     |
-    |                                          |   smp_mb_acquire();              |
-    +------------------------------------------+----------------------------------+
-    | ::                                       | ::                               |
-    |                                          |                                  |
-    |                                          |   smp_mb_release();              |
-    |   for (i = 0; i < 10; i++)               |   for (i = 0; i < 10; i++)       |
+    |                                               |   smp_mb_acquire();                   |
+    +-----------------------------------------------+---------------------------------------+
+    | ::                                            | ::                                    |
+    |                                               |                                       |
+    |                                               |   smp_mb_release();                   |
+    |   for (i = 0; i < 10; i++)                    |   for (i = 0; i < 10; i++)            |
     |     qemu_atomic_store_release(&a[i], false);  |     qemu_atomic_set(&a[i], false);    |
-    +------------------------------------------+----------------------------------+
+    +-----------------------------------------------+---------------------------------------+
 
 Splitting a loop can also be useful to reduce the number of barriers:
 
-    +------------------------------------------+----------------------------------+
-    | before                                   | after                            |
-    +==========================================+==================================+
-    | ::                                       | ::                               |
-    |                                          |                                  |
-    |   n = 0;                                 |     smp_mb_release();            |
-    |   for (i = 0; i < 10; i++) {             |     for (i = 0; i < 10; i++)     |
+    +-----------------------------------------------+---------------------------------------+
+    | before                                        | after                                 |
+    +===============================================+=======================================+
+    | ::                                            | ::                                    |
+    |                                               |                                       |
+    |   n = 0;                                      |     smp_mb_release();                 |
+    |   for (i = 0; i < 10; i++) {                  |     for (i = 0; i < 10; i++)          |
     |     qemu_atomic_store_release(&a[i], false);  |       qemu_atomic_set(&a[i], false);  |
-    |     smp_mb();                            |     smb_mb();                    |
-    |     n += qemu_atomic_read(&b[i]);             |     n = 0;                       |
-    |   }                                      |     for (i = 0; i < 10; i++)     |
-    |                                          |       n += qemu_atomic_read(&b[i]);   |
-    +------------------------------------------+----------------------------------+
+    |     smp_mb();                                 |     smb_mb();                         |
+    |     n += qemu_atomic_read(&b[i]);             |     n = 0;                            |
+    |   }                                           |     for (i = 0; i < 10; i++)          |
+    |                                               |       n += qemu_atomic_read(&b[i]);   |
+    +-----------------------------------------------+---------------------------------------+
 
 In this case, a ``smp_mb_release()`` is also replaced with a (possibly cheaper, and clearer
 as well) ``smp_wmb()``:
 
-    +------------------------------------------+----------------------------------+
-    | before                                   | after                            |
-    +==========================================+==================================+
-    | ::                                       | ::                               |
-    |                                          |                                  |
-    |                                          |     smp_mb_release();            |
-    |   for (i = 0; i < 10; i++) {             |     for (i = 0; i < 10; i++)     |
+    +-----------------------------------------------+---------------------------------------+
+    | before                                        | after                                 |
+    +===============================================+=======================================+
+    | ::                                            | ::                                    |
+    |                                               |                                       |
+    |                                               |     smp_mb_release();                 |
+    |   for (i = 0; i < 10; i++) {                  |     for (i = 0; i < 10; i++)          |
     |     qemu_atomic_store_release(&a[i], false);  |       qemu_atomic_set(&a[i], false);  |
-    |     qemu_atomic_store_release(&b[i], false);  |     smb_wmb();                   |
-    |   }                                      |     for (i = 0; i < 10; i++)     |
-    |                                          |       qemu_atomic_set(&b[i], false);  |
-    +------------------------------------------+----------------------------------+
+    |     qemu_atomic_store_release(&b[i], false);  |     smb_wmb();                        |
+    |   }                                           |     for (i = 0; i < 10; i++)          |
+    |                                               |       qemu_atomic_set(&b[i], false);  |
+    +-----------------------------------------------+---------------------------------------+
 
 
 .. _acqrel:
@@ -306,8 +306,8 @@ as well) ``smp_wmb()``:
 Acquire/release pairing and the *synchronizes-with* relation
 ------------------------------------------------------------
 
-Atomic operations other than ``qemu_atomic_set()`` and ``qemu_atomic_read()`` have
-either *acquire* or *release* semantics [#rmw]_.  This has two effects:
+Atomic operations other than ``qemu_atomic_set()`` and ``qemu_atomic_read()``
+have either *acquire* or *release* semantics [#rmw]_.  This has two effects:
 
 .. [#rmw] Read-modify-write operations can have both---acquire applies to the
           read part, and release to the write.
@@ -357,8 +357,8 @@ thread 2 is relying on the *synchronizes-with* relation between ``pthread_exit``
 
 Synchronization between threads basically descends from this pairing of
 a release operation and an acquire operation.  Therefore, atomic operations
-other than ``qemu_atomic_set()`` and ``qemu_atomic_read()`` will almost always be
-paired with another operation of the opposite kind: an acquire operation
+other than ``qemu_atomic_set()`` and ``qemu_atomic_read()`` will almost always
+be paired with another operation of the opposite kind: an acquire operation
 will pair with a release operation and vice versa.  This rule of thumb is
 extremely useful; in the case of QEMU, however, note that the other
 operation may actually be in a driver that runs in the guest!
@@ -366,21 +366,21 @@ operation may actually be in a driver that runs in the guest!
 ``smp_read_barrier_depends()``, ``smp_rmb()``, ``smp_mb_acquire()``,
 ``qemu_atomic_load_acquire()`` and ``qemu_atomic_rcu_read()`` all count
 as acquire operations.  ``smp_wmb()``, ``smp_mb_release()``,
-``qemu_atomic_store_release()`` and ``qemu_atomic_rcu_set()`` all count as release
-operations.  ``smp_mb()`` counts as both acquire and release, therefore
+``qemu_atomic_store_release()`` and ``qemu_atomic_rcu_set()`` all count as
+release operations.  ``smp_mb()`` counts as both acquire and release, therefore
 it can pair with any other atomic operation.  Here is an example:
 
-      +----------------------+------------------------------+
-      | thread 1             | thread 2                     |
-      +======================+==============================+
-      | ::                   | ::                           |
-      |                      |                              |
+      +---------------------------+------------------------------+
+      | thread 1                  | thread 2                     |
+      +===========================+==============================+
+      | ::                        | ::                           |
+      |                           |                              |
       |   qemu_atomic_set(&a, 1); |                              |
-      |   smp_wmb();         |                              |
-      |   qemu_atomic_set(&b, 2); |   x = qemu_atomic_read(&b);       |
-      |                      |   smp_rmb();                 |
-      |                      |   y = qemu_atomic_read(&a);       |
-      +----------------------+------------------------------+
+      |   smp_wmb();              |                              |
+      |   qemu_atomic_set(&b, 2); |   x = qemu_atomic_read(&b);  |
+      |                           |   smp_rmb();                 |
+      |                           |   y = qemu_atomic_read(&a);  |
+      +---------------------------+------------------------------+
 
 Note that a load-store pair only counts if the two operations access the
 same variable: that is, a store-release on a variable ``x`` *synchronizes
@@ -388,15 +388,15 @@ with* a load-acquire on a variable ``x``, while a release barrier
 synchronizes with any acquire operation.  The following example shows
 correct synchronization:
 
-      +--------------------------------+--------------------------------+
-      | thread 1                       | thread 2                       |
-      +================================+================================+
-      | ::                             | ::                             |
-      |                                |                                |
-      |   qemu_atomic_set(&a, 1);           |                                |
+      +-------------------------------------+-------------------------------------+
+      | thread 1                            | thread 2                            |
+      +=====================================+=====================================+
+      | ::                                  | ::                                  |
+      |                                     |                                     |
+      |   qemu_atomic_set(&a, 1);           |                                     |
       |   qemu_atomic_store_release(&b, 2); |   x = qemu_atomic_load_acquire(&b); |
-      |                                |   y = qemu_atomic_read(&a);         |
-      +--------------------------------+--------------------------------+
+      |                                     |   y = qemu_atomic_read(&a);         |
+      +-------------------------------------+-------------------------------------+
 
 Acquire and release semantics of higher-level primitives can also be
 relied upon for the purpose of establishing the *synchronizes with*
@@ -412,21 +412,21 @@ Finally, this more complex example has more than two accesses and data
 dependency barriers.  It also does not use atomic accesses whenever there
 cannot be a data race:
 
-      +----------------------+------------------------------+
-      | thread 1             | thread 2                     |
-      +======================+==============================+
-      | ::                   | ::                           |
-      |                      |                              |
-      |   b[2] = 1;          |                              |
-      |   smp_wmb();         |                              |
-      |   x->i = 2;          |                              |
-      |   smp_wmb();         |                              |
-      |   qemu_atomic_set(&a, x); |  x = qemu_atomic_read(&a);        |
-      |                      |  smp_read_barrier_depends(); |
-      |                      |  y = x->i;                   |
-      |                      |  smp_read_barrier_depends(); |
-      |                      |  z = b[y];                   |
-      +----------------------+------------------------------+
+      +---------------------------+------------------------------+
+      | thread 1                  | thread 2                     |
+      +===========================+==============================+
+      | ::                        | ::                           |
+      |                           |                              |
+      |   b[2] = 1;               |                              |
+      |   smp_wmb();              |                              |
+      |   x->i = 2;               |                              |
+      |   smp_wmb();              |                              |
+      |   qemu_atomic_set(&a, x); |  x = qemu_atomic_read(&a);   |
+      |                           |  smp_read_barrier_depends(); |
+      |                           |  y = x->i;                   |
+      |                           |  smp_read_barrier_depends(); |
+      |                           |  z = b[y];                   |
+      +---------------------------+------------------------------+
 
 Comparison with Linux kernel primitives
 =======================================
@@ -438,50 +438,50 @@ and memory barriers, and the equivalents in QEMU:
   use a boxed ``atomic_t`` type; atomic operations in QEMU are polymorphic
   and use normal C types.
 
-- Originally, ``qemu_atomic_read`` and ``qemu_atomic_set`` in Linux gave no guarantee
-  at all. Linux 4.1 updated them to implement volatile
+- Originally, ``qemu_atomic_read`` and ``qemu_atomic_set`` in Linux gave no
+  guarantee at all. Linux 4.1 updated them to implement volatile
   semantics via ``ACCESS_ONCE`` (or the more recent ``READ``/``WRITE_ONCE``).
 
-  QEMU's ``qemu_atomic_read`` and ``qemu_atomic_set`` implement C11 atomic relaxed
-  semantics if the compiler supports it, and volatile semantics otherwise.
-  Both semantics prevent the compiler from doing certain transformations;
-  the difference is that atomic accesses are guaranteed to be atomic,
-  while volatile accesses aren't. Thus, in the volatile case we just cross
-  our fingers hoping that the compiler will generate atomic accesses,
-  since we assume the variables passed are machine-word sized and
-  properly aligned.
+  QEMU's ``qemu_atomic_read`` and ``qemu_atomic_set`` implement C11 atomic
+  relaxed semantics if the compiler supports it, and volatile semantics
+  otherwise. Both semantics prevent the compiler from doing certain
+  transformations; the difference is that atomic accesses are guaranteed to be
+  atomic, while volatile accesses aren't. Thus, in the volatile case we just
+  cross our fingers hoping that the compiler will generate atomic accesses,
+  since we assume the variables passed are machine-word sized and properly
+  aligned.
 
-  No barriers are implied by ``qemu_atomic_read`` and ``qemu_atomic_set`` in either Linux
-  or QEMU.
+  No barriers are implied by ``qemu_atomic_read`` and ``qemu_atomic_set`` in
+  either Linux or QEMU.
 
 - atomic read-modify-write operations in Linux are of three kinds:
 
-         ===================== =========================================
-         ``atomic_OP``         returns void
-         ``atomic_OP_return``  returns new value of the variable
-         ``atomic_fetch_OP``   returns the old value of the variable
-         ``qemu_atomic_cmpxchg``    returns the old value of the variable
-         ===================== =========================================
+         ======================= =========================================
+         ``atomic_OP``           returns void
+         ``atomic_OP_return``    returns new value of the variable
+         ``atomic_fetch_OP``     returns the old value of the variable
+         ``atomic_cmpxchg``      returns the old value of the variable
+         ======================= =========================================
 
-  In QEMU, the second kind is named ``atomic_OP_fetch``.
+  In QEMU, the second kind is named ``qemu_atomic_OP_fetch``.
 
 - different atomic read-modify-write operations in Linux imply
   a different set of memory barriers; in QEMU, all of them enforce
   sequential consistency.
 
-- in QEMU, ``qemu_atomic_read()`` and ``qemu_atomic_set()`` do not participate in
-  the total ordering enforced by sequentially-consistent operations.
+- in QEMU, ``qemu_atomic_read()`` and ``qemu_atomic_set()`` do not participate
+  in the total ordering enforced by sequentially-consistent operations.
   This is because QEMU uses the C11 memory model.  The following example
   is correct in Linux but not in QEMU:
 
-      +----------------------------------+--------------------------------+
-      | Linux (correct)                  | QEMU (incorrect)               |
-      +==================================+================================+
-      | ::                               | ::                             |
-      |                                  |                                |
-      |   a = qemu_atomic_fetch_add(&x, 2);   |   a = qemu_atomic_fetch_add(&x, 2); |
-      |   b = READ_ONCE(&y);             |   b = qemu_atomic_read(&y);         |
-      +----------------------------------+--------------------------------+
+      +-------------------------------------+-------------------------------------+
+      | Linux (correct)                     | QEMU (incorrect)                    |
+      +=====================================+=====================================+
+      | ::                                  | ::                                  |
+      |                                     |                                     |
+      |   a = qemu_atomic_fetch_add(&x, 2); |   a = qemu_atomic_fetch_add(&x, 2); |
+      |   b = READ_ONCE(&y);                |   b = qemu_atomic_read(&y);         |
+      +-------------------------------------+-------------------------------------+
 
   because the read of ``y`` can be moved (by either the processor or the
   compiler) before the write of ``x``.
@@ -495,10 +495,10 @@ and memory barriers, and the equivalents in QEMU:
       +================================+
       | ::                             |
       |                                |
-      |   a = qemu_atomic_read(&x);         |
-      |   qemu_atomic_set(&x, a + 2);       |
+      |   a = qemu_atomic_read(&x);    |
+      |   qemu_atomic_set(&x, a + 2);  |
       |   smp_mb();                    |
-      |   b = qemu_atomic_read(&y);         |
+      |   b = qemu_atomic_read(&y);    |
       +--------------------------------+
 
 Sources
diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc
index 08033625bc..c24fb403da 100644
--- a/tcg/sparc/tcg-target.c.inc
+++ b/tcg/sparc/tcg-target.c.inc
@@ -1839,7 +1839,8 @@ void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_addr,
     tcg_debug_assert(br_disp == (int32_t)br_disp);
 
     if (!USE_REG_TB) {
-        qemu_atomic_set((uint32_t *)jmp_addr, deposit32(CALL, 0, 30, br_disp >> 2));
+        qemu_atomic_set((uint32_t *)jmp_addr,
+		        deposit32(CALL, 0, 30, br_disp >> 2));
         flush_icache_range(jmp_addr, jmp_addr + 4);
         return;
     }
diff --git a/tests/.gitignore b/tests/.gitignore
index b2c243a4d2..d03c037d77 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -1,4 +1,4 @@
-qemu_atomic_add-bench
+atomic_add-bench
 benchmark-crypto-cipher
 benchmark-crypto-hash
 benchmark-crypto-hmac
diff --git a/tests/meson.build b/tests/meson.build
index 16128b4115..8c3e930687 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -4,8 +4,8 @@ qht_bench = executable('qht-bench',
                        sources: 'qht-bench.c',
                        dependencies: [qemuutil])
 
-executable('qemu_atomic_add-bench',
-           sources: files('qemu_atomic_add-bench.c'),
+executable('atomic_add-bench',
+           sources: files('atomic_add-bench.c'),
            dependencies: [qemuutil],
            build_by_default: false)
 
